PMIC Design Verification Engineer - Staff
Description For PMIC Design Verification Engineer - Staff
Qualcomm is seeking a Staff-level PMIC Design Verification Engineer to join their team in Bangalore. This role focuses on digital verification for Mixed-Signals IPs, ASICs, and Chipsets used in Qualcomm Snapdragon power solutions. The position involves working with cutting-edge technologies including telemetry ADCs, 100W+ charging (Quick Charge 5.0), 5G power solutions, and high-efficiency power management systems.
The ideal candidate will have extensive experience in ASIC design and verification, with strong expertise in System Verilog and UVM. They will be responsible for all stages of the verification process, from test planning to coverage closure, while working with international teams on high-volume projects reaching 100M+ units.
Qualcomm offers a comprehensive benefits package including world-class health coverage, financial planning support, and continuous learning opportunities. The company's culture promotes innovation, collaboration, and professional growth through mentorship programs and tuition reimbursement.
This role presents an exciting opportunity to work at the forefront of mobile technology, contributing to projects that impact millions of devices worldwide. The position requires strong technical skills combined with excellent communication abilities, as you'll be collaborating with cross-functional teams globally.
Responsibilities For PMIC Design Verification Engineer - Staff
- Digital Verification for Mixed-Signals IPs, ASICs and Chipsets used in Qualcomm Snapdragon power solutions
- Partner with international teams in all stages of development
- Test planning and UVM-compliant test-bench architecture
- Constrained-random stimulus creation, score-boarding and coverage closure
- Debugging of complex embedded systems including SOCs, firmware, embedded sequencers
- IP or chip DV ownership including task planning and project risk mitigation
- Work in a dynamic team environment with aggressive schedule
Requirements For PMIC Design Verification Engineer - Staff
- Bachelor's degree in Science, Engineering, or related field
- 8+ years ASIC design, verification, or related work experience
- Expert-level System Verilog Programming
- Advanced UVM/SV (Universal Verification Methodology using System Verilog)
- Python or Perl scripting
- Strong troubleshooting skills across embedded systems disciplines
- Strong communication and organizational skills
- Strong process-oriented mindset
Benefits For PMIC Design Verification Engineer - Staff
- World-class health coverage for employees and dependents
- Financial planning and future security programs
- Emotional/mental strength and resilience support
- Wellbeing programs
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship programs
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