RTL design -Lead Engineer
Description For RTL design -Lead Engineer
Qualcomm India Private Limited is seeking a Lead RTL Design Engineer to join their Hardware Engineering team in Chennai. This role represents an exciting opportunity to work on complex System-on-Chip (SoC) designs at a global leader in wireless technology innovation. The position requires extensive experience in digital design, particularly in RTL coding and micro-architecture development.
The ideal candidate will bring 6-9 years of SoC design experience, with deep expertise in Verilog/System-Verilog and AMBA protocols. You'll be responsible for leading complex SoC integration efforts, working on low-power design implementations, and collaborating with verification and validation teams for silicon debug. The role demands strong technical knowledge in ASIC design, timing analysis, and modern EDA tools.
At Qualcomm, you'll work alongside leading engineering experts, contributing to breakthrough technologies that impact lives globally. The company offers comprehensive benefits, including world-class health coverage, financial planning support, and continuous learning opportunities. You'll be part of a supportive, inclusive culture that values innovation and technical excellence.
This position offers significant growth potential, with opportunities to work on cutting-edge semiconductor technologies while developing your leadership skills. If you're passionate about hardware design and ready to take on complex technical challenges in a collaborative environment, this role offers the perfect platform to advance your career in semiconductor design.
Responsibilities For RTL design -Lead Engineer
- SoC design and integration for complex SoCs
- Work with SoC verification and validation teams for pre/post Silicon debug
- Timing closure and constraint development
- Work with chip level floorplan team
- Handle pad ring development
Requirements For RTL design -Lead Engineer
- Bachelor's/Master's degree in Electrical engineering
- 6-9 years of experience in SoC design
- Experience in Logic design/micro-architecture/RTL coding
- Experience in Verilog/System-Verilog
- Knowledge of AMBA protocols - AXI, AHB, APB
- Understanding of SoC clocking/reset/debug architecture
- Experience in Low power SoC design
- Experience in Synthesis and timing concepts for ASIC
- Experience in Multi Clock designs and Asynchronous interface
- Experience with tools like Lint, CDC, Design compiler and Primetime
Benefits For RTL design -Lead Engineer
- World-class health coverage for employees and dependents
- Financial planning and future security programs
- Emotional/mental wellbeing support
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship programs
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