RTL design -Lead Engineer

Qualcomm is a global technology leader specializing in semiconductor and telecommunications equipment.
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Staff Software Engineer
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5,000+ Employees
6+ years of experience
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Description For RTL design -Lead Engineer

Qualcomm India Private Limited is seeking a Lead RTL Design Engineer to join their Hardware Engineering team in Chennai. This role requires an experienced professional with 6-9 years of expertise in SoC design and integration. The ideal candidate will possess strong skills in Logic design, micro-architecture, and RTL coding, with hands-on experience in complex SoC integration.

The position demands expertise in Verilog/System-Verilog and deep knowledge of AMBA protocols (AXI, AHB, APB), along with comprehensive understanding of SoC architectures. You'll be working with cutting-edge technology, focusing on low power SoC design, timing closure, and multi-clock designs. The role involves close collaboration with verification and validation teams for silicon debug processes.

Qualcomm offers an exceptional work environment where innovation thrives. As a Lead Engineer, you'll have the opportunity to work alongside industry experts and contribute to groundbreaking technologies. The company provides comprehensive benefits including world-class health coverage, financial planning support, and continuous learning opportunities.

This role is perfect for someone who is passionate about hardware engineering and wants to make a significant impact in the semiconductor industry. You'll be part of a team that drives technological advancement while having access to professional development resources and mentorship opportunities. The position offers both technical challenges and leadership opportunities, making it an ideal next step for experienced RTL designers looking to advance their careers.

Last updated 17 hours ago

Responsibilities For RTL design -Lead Engineer

  • Work closely with the SoC verification and validation teams for pre/post Silicon debug
  • Design and integrate complex SoCs
  • Develop constraints and ensure timing closure
  • Work with chip level floorplan team

Requirements For RTL design -Lead Engineer

Linux
  • Bachelor's/Master's degree in Electrical engineering
  • 6-9 years of experience in SoC design
  • Experience in Logic design/micro-architecture/RTL coding
  • Hands-on experience with SoC design and integration for complex SoCs
  • Experience in Verilog/System-Verilog
  • Knowledge of AMBA protocols - AXI, AHB, APB
  • Understanding of SoC clocking/reset/debug architecture
  • Experience in Low power SoC design
  • Experience in Synthesis and timing concepts for ASIC
  • Experience in Multi Clock designs and Asynchronous interface
  • Experience with tools like Lint, CDC, Design compiler and Primetime

Benefits For RTL design -Lead Engineer

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
Education Budget
  • World-class health coverage for employees and eligible dependents
  • Financial planning and future security programs
  • Emotional/mental strength and resilience support
  • Wellbeing programs
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

Interested in this job?

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