RTL Design - Sr Staff/ Principal Engineer
Description For RTL Design - Sr Staff/ Principal Engineer
Qualcomm India Private Limited is seeking a Principal RTL Design Engineer with extensive experience in SoC design. This role combines deep technical expertise in hardware engineering with leadership responsibilities. The position requires mastery of AMBA protocols, SoC architecture, and various hardware interfaces. You'll be working on cutting-edge semiconductor technology, managing complex design implementations, and collaborating with cross-functional teams.
The ideal candidate will bring 15+ years of experience in SoC design, with proven expertise in low-power design, timing closure, and multi-clock domains. You'll be instrumental in developing sophisticated hardware solutions while working with state-of-the-art ASIC development tools. This role offers an opportunity to work with industry-leading experts and contribute to groundbreaking technological innovations.
Qualcomm offers comprehensive benefits including world-class health coverage, financial planning support, and continuous learning opportunities. The company fosters an inclusive culture that promotes innovation and professional growth. Based in Chennai, you'll be part of a global team pushing the boundaries of wireless technology and semiconductor design.
Responsibilities For RTL Design - Sr Staff/ Principal Engineer
- Work closely with SoC verification and validation teams for pre/post Silicon debug
- Develop and implement RTL designs
- Handle timing closure and constraint development
- Manage low power SoC design implementation
- Work with multiple clock domains and asynchronous interfaces
Requirements For RTL Design - Sr Staff/ Principal Engineer
- 15+ years of experience in SoC design
- Knowledge of AMBA protocols - AXI, AHB, APB
- Understanding of SoC clocking/reset/debug architecture
- Experience with peripherals like USB, PCIE and SDCC
- Hands-on experience in constraint development and timing closure
- Experience in Low power SoC design
- Experience in Synthesis and ASIC timing concepts
- Hands-on experience in Multi Clock designs and Asynchronous interface
- Experience with ASIC development tools (Lint, CDC, Design compiler, Primetime)
- Bachelor's/Master's degree in Computer Science, Electrical/Electronics Engineering or related field
Benefits For RTL Design - Sr Staff/ Principal Engineer
- World-class health coverage for employees and dependents
- Financial planning and future security programs
- Emotional and mental wellbeing support
- Work-life balance resources
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship opportunities
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