RTL Design - Sr Staff/ Principal Engineer
Description For RTL Design - Sr Staff/ Principal Engineer
Qualcomm India Private Limited is seeking a Principal RTL Design Engineer to join their hardware engineering team in Chennai. This role requires extensive experience in SoC design and will involve working with cutting-edge technology in semiconductor development. The ideal candidate will have 15+ years of experience in SoC design with deep knowledge of AMBA protocols, memory controllers, and microprocessor architectures. You'll be responsible for developing complex RTL designs, managing timing closure, and working closely with verification teams.
The position offers an opportunity to work with some of the industry's leading engineering experts and contribute to world-changing innovations in wireless technology. Qualcomm provides comprehensive benefits including health coverage, professional development opportunities, and wellbeing programs. The company fosters a supportive, inclusive culture where innovative ideas are valued and career growth is prioritized.
As a Principal Engineer, you'll be at the forefront of semiconductor technology, working on challenging projects that require expertise in low power SoC design, multi-clock designs, and asynchronous interfaces. The role demands strong technical leadership and hands-on experience with industry-standard ASIC development tools. Join Qualcomm to be part of a team that's shaping the future of wireless technology and mobile innovation.
Responsibilities For RTL Design - Sr Staff/ Principal Engineer
- Work closely with SoC verification and validation teams for pre/post Silicon debug
- Develop and implement RTL designs
- Handle timing closure and constraints development
- Manage low power SoC design implementation
- Oversee multi-clock and asynchronous interface designs
Requirements For RTL Design - Sr Staff/ Principal Engineer
- 15+ years of experience in SoC design
- Knowledge of AMBA protocols - AXI, AHB, APB
- Understanding of SoC clocking/reset/debug architecture
- Experience with peripherals like USB, PCIE and SDCC
- Understanding of Memory controller designs and microprocessors
- Hands-on experience in constraint development and timing closure
- Experience in Low power SoC design
- Experience in Synthesis and timing concepts for ASIC
- Experience in Multi Clock designs and Asynchronous interface
- Proficiency with ASIC development tools (Lint, CDC, Design compiler, Primetime)
- Bachelor's/Master's degree in Electrical/Electronics Engineering or related field
Benefits For RTL Design - Sr Staff/ Principal Engineer
- World-class health coverage for employees and dependents
- Financial planning and future security programs
- Emotional/mental health support
- Wellbeing programs
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship opportunities
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