Lead Analog Layout Engineer

A global leader in wireless technology innovation and the development of semiconductors and mobile technologies.
Embedded
Staff Software Engineer
In-Person
5,000+ Employees
5+ years of experience
AI · Enterprise SaaS

Description For Lead Analog Layout Engineer

Qualcomm India Private Limited is seeking a Lead Analog Layout Engineer to join their Engineering Services Group. This role requires an experienced professional with expertise in custom analog layouts and SerDes blocks. The position involves developing complex block, macro, and chip level layouts while working with cutting-edge technology.

The ideal candidate will have at least 5 years of experience in custom analog layouts, with specific expertise in SerDes Blocks like PLL, Tx, and Rx. Finfet experience is mandatory, and proficiency with layout design and verification tools is essential. Knowledge of Cadence Skills Scripting and Totem ESD flows would be an advantage.

At Qualcomm, you'll work alongside leading engineering and technology experts, contributing to world-changing innovations and breakthrough technologies. The company offers comprehensive benefits including world-class health coverage, financial planning support, wellbeing programs, and continuous learning opportunities through tuition reimbursement and mentorship programs.

This role offers an opportunity to work on cutting-edge semiconductor technology while being part of a global leader in wireless technology innovation. The position requires strong technical skills combined with the ability to collaborate effectively with multiple stakeholders. Join Qualcomm to be part of transformative technology development while growing your career in a supportive, inclusive environment.

Last updated 20 hours ago

Responsibilities For Lead Analog Layout Engineer

  • Develops block, macro, or chip level layouts and floorplans
  • Creates accurate designs that meet project needs
  • Conducts analyses, tests, and verifies designs
  • Works with multiple internal and external stakeholders
  • Provides updates and resolves issues

Requirements For Lead Analog Layout Engineer

  • Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field
  • 5+ Years of Experience in Custom Analog Layouts
  • Minimum 5+ years of experience in SerDes Blocks like PLL, Tx and Rx
  • Finfet Experience is mandatory
  • 2+ years of experience using layout design and verification tools
  • Knowledge in Cadence Skills Scripting, Totem ESD flows
  • Need to Possess Good Attitude and team player

Benefits For Lead Analog Layout Engineer

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
Education Budget
  • World-class health coverage for employees and dependents
  • Financial planning and future preparation programs
  • Emotional/mental strength and resilience support
  • Wellbeing programs
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship programs

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