Serdes PHY Analog Design Engineer

A leading technology company specializing in wireless technology and semiconductor development.
Backend
Senior Software Engineer
In-Person
5,000+ Employees
4+ years of experience
AI · Enterprise SaaS

Description For Serdes PHY Analog Design Engineer

Qualcomm India Private Limited is seeking a Serdes PHY Analog Design Engineer to join their growing team. This role offers an exciting opportunity to work on cutting-edge technology in high-speed SerDes PHYs and next-generation custom PHY designs for SoCs. The position requires expertise in analog circuit design with a focus on low-power solutions for Qualcomm's wireless products.

The ideal candidate will have 4-12+ years of experience in analog circuit design, with deep knowledge of PLL design, high-speed TX/RX implementations, and advanced Finfet processes. You'll be working with cross-functional teams across the globe, contributing to architecture analysis in leading-node technologies.

Qualcomm offers a comprehensive benefits package including world-class health coverage, financial planning support, and continuous learning opportunities. The company fosters an inclusive culture that encourages innovation and professional growth. This role provides an excellent opportunity to work with industry-leading experts while developing cutting-edge semiconductor solutions.

The position is based in Bangalore, India, and offers the chance to work on challenging projects that impact global wireless technology. You'll be part of a team that values technical excellence, innovation, and collaborative problem-solving. Join Qualcomm to push the boundaries of analog design and contribute to next-generation wireless solutions.

Last updated 19 days ago

Responsibilities For Serdes PHY Analog Design Engineer

  • Design and implement high speed SerDes PHYs
  • Perform schematic to post layout verification
  • Handle integration sign-off to post silicon bring up
  • Work with RTL, DD, PD, DV and SoC verification teams
  • Deliver next-generation custom PHY designs for SoCs
  • Develop low-power analog designs for wireless products

Requirements For Serdes PHY Analog Design Engineer

Linux
  • Bachelor's/Master's/PhD in Computer Science, Electrical/Electronics Engineering or related field
  • Experience in designing analog building blocks - LDO, high speed TX and RX
  • Experience with PLL design and implementation
  • Understanding of advanced Finfet process effects
  • Experience with SPICE simulators, adexl & virtuoso
  • Post-Si bring-up and debug experience
  • Shell/Perl-python scripting knowledge
  • Good communication and presentation skills

Benefits For Serdes PHY Analog Design Engineer

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
Education Budget
  • World-class health coverage for employees and dependents
  • Financial planning and future security programs
  • Emotional/mental strength and resilience support
  • Wellbeing programs and resources
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

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