SOC Design Verification Engineer (Multiple Roles)
Description For SOC Design Verification Engineer (Multiple Roles)
Qualcomm is seeking experienced SOC Design Verification Engineers for multiple roles in their Bangalore office. As a verification engineer, you'll be responsible for critical aspects of SoC design verification, including interconnect DV, power verification, and debug infrastructure verification. The role involves working with cutting-edge technologies in automotive, compute, mobile, and XR-VR SOCs. You'll collaborate with cross-functional teams to develop verification strategies, test plans, and ensure highest quality standards. The position offers exposure to high-performance CPU and Memory sub-systems, NOC based Interconnect Fabric, and advanced power optimization techniques. Qualcomm provides a collaborative environment where you'll work alongside industry experts and contribute to world-changing innovations. The company offers comprehensive benefits, professional development opportunities, and a culture that promotes innovation and growth. This role is perfect for experienced professionals looking to advance their careers in hardware verification at a leading technology company.
Responsibilities For SOC Design Verification Engineer (Multiple Roles)
- Understand design specification and implementation
- Define verification scope and develop test plans
- Work with verification team to analyze and execute test cases
- Collaborate with architects, designers, and verification teams
- Develop test infrastructure and verify design correctness
- Participate in post Si debug and bring-up activities
- Own SoC Interconnect DV during project work
- Verify Subsystems and Full SoC using advanced verification methodologies
Requirements For SOC Design Verification Engineer (Multiple Roles)
- B.E/B.Tech/M.E/M.Tech in Electronics with 7+ year experience in verification domain
- Good understanding of SoC level verification testbench and flows
- Working knowledge of Interconnect architecture and Bus protocols
- Solid hands-on working experience on System Verilog and UVM methodology
- Strong System Verilog/UVM based verification skills
- Good understanding of low power design techniques
- Experience with UPF/CPF based power aware verification
- Good debugging and analytical skills
- Excellent communication skills
Benefits For SOC Design Verification Engineer (Multiple Roles)
- World-class health coverage for employees and dependents
- Financial planning and future security programs
- Emotional/mental wellbeing support
- Work-life balance programs
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship opportunities
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