SOC Design Verification Sr Engineer
Description For SOC Design Verification Sr Engineer
Qualcomm is seeking a Senior SOC Design Verification Engineer to join their team in Hyderabad. This role focuses on verifying highly complex auto, compute, mobile, XR-VR, and IoT SOCs. As a DV Engineer, you'll be responsible for understanding internal requirements, architecting verification strategies, and ensuring the highest quality standards in design verification.
The position requires extensive experience in digital ASIC verification and system-level hardware/software debug techniques. You'll work with cutting-edge technologies and be involved early in the product lifecycle, participating in architecture and product definition. The role demands expertise in System Verilog/UVM-based verification, assertion & coverage-based methodologies, and a deep understanding of low power design techniques.
Qualcomm offers a comprehensive benefits package including world-class health coverage, financial planning support, and continuous learning opportunities. The company fosters an innovative environment where you'll work alongside leading engineering and technology experts, contributing to breakthrough technologies that impact lives globally.
The ideal candidate will have 5+ years of verification domain experience, strong fundamentals in digital ASIC verification, and expertise in IP/SS/SoC level verification. You'll be responsible for developing test plans, building verification environments, and ensuring complete coverage of all design aspects. This is an excellent opportunity for someone passionate about hardware engineering and verification to work on cutting-edge technology at a global leader in wireless innovation.
Responsibilities For SOC Design Verification Sr Engineer
- Define verification architecture, develop test plans and build verification environment
- Work with design team to understand design intent
- Verify Subsystems and Full SoC using advanced verification methodologies
- Build agents and checkers from scratch
- Develop test plan to verify all low power aspects
- Own end to end DV tasks
- Assist in silicon bring-up, debug and bring-up activities
Requirements For SOC Design Verification Sr Engineer
- B.E/B.Tech/M.E/M.Tech in Electronics with 5+ year experience in verification domain
- Strong fundamentals in digital ASIC verification
- Experience in IP/SS/SoC level verification
- System Verilog/UVM based verification skills
- Working knowledge of Interconnect architecture and Bus protocols
- Good understanding of low power design techniques
- Experience with UPF/CPF based power aware verification
- Knowledge of Multimedia design blocks
- Knowledge of peripheral blocks verification
Benefits For SOC Design Verification Sr Engineer
- World-class health coverage for employees and dependents
- Financial planning and future security programs
- Emotional/mental health support
- Wellbeing programs
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship programs
