Sr Lead Engineer - DFT

A leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation.
Staff Software Engineer
In-Person
5+ years of experience
Enterprise SaaS
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Description For Sr Lead Engineer - DFT

Qualcomm India Private Limited is seeking a Senior Lead Engineer specializing in Design for Test (DFT) to join their Hardware Engineering team in Hyderabad. As a leading technology innovator, Qualcomm is at the forefront of pushing boundaries in next-generation experiences and digital transformation.

The role requires a seasoned professional with 5+ years of hardware engineering experience, who will be responsible for critical DFT implementations including scan insertion, MBIST validation, and ATPG coverage analysis. The ideal candidate will have deep expertise in MBIST Operations and proficiency with industry-standard tools like Mentor ATPG and Synopsys' Synthesis.

This position offers an opportunity to work with cutting-edge technology and collaborate with cross-functional teams in a world-class engineering environment. The role demands strong technical skills combined with excellent communication abilities, as you'll be working independently while interfacing with various teams to resolve complex technical challenges.

Qualcomm offers comprehensive benefits including world-class health coverage, financial planning support, mental health resources, and continuous learning opportunities. The company fosters an inclusive culture that encourages innovation and professional growth through mentorship programs and tuition reimbursement.

Join Qualcomm to be part of a team that's shaping the future of technology while working alongside some of the industry's brightest minds. This role offers not just a job, but a career growth journey with endless possibilities to contribute to world-changing innovations.

Last updated 4 months ago

Responsibilities For Sr Lead Engineer - DFT

  • Own and deliver scan insertion
  • Validate equivalence checks and Debug/resolve DRC issues
  • Analyzing and meeting ATPG coverage goals
  • Own and deliver MBIST insertion, validate Memory tests
  • Own STA constraints and work with STA team to resolve timing violations

Requirements For Sr Lead Engineer - DFT

Linux
  • Bachelor's or Master's degree in Computer Science, Electrical/Electronics Engineering, or related field
  • Knowledge in MBIST Operations
  • Expertise in handling Mentor ATPG tools, Synopsys' Synthesis & SMS tool sets
  • Experience in Test coverage analysis and Simulation of ATPG vectors & MBIST tests
  • 5+ years of Hardware Engineering experience
  • Verbal and written communication skills

Benefits For Sr Lead Engineer - DFT

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
Education Budget
  • World-class health coverage for employees and dependents
  • Financial planning and security programs
  • Mental health and emotional support
  • Wellbeing programs
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

Interested in this job?