Sr Staff Machine Learning ASIC Design Engineer
Description For Sr Staff Machine Learning ASIC Design Engineer
Qualcomm Canada ULC is seeking a Senior Staff Machine Learning ASIC Design Engineer to join their innovative team. As the world's leading developer of next-generation wireless and multimedia technology, Qualcomm is at the forefront of AI/ML hardware development.
This role offers an exciting opportunity to work on cutting-edge machine learning hardware solutions, developing world-class AI/ML HW IP. The position requires expertise in ASIC design, with responsibilities including micro-architecture development, RTL design optimization, and integration of sub-IPs. You'll be working with state-of-the-art tools and technologies, collaborating with cross-functional teams to deliver high-performance solutions.
The ideal candidate will bring strong technical expertise in ASIC design, verification, and validation, combined with excellent communication and collaboration skills. You'll be working with advanced concepts including clock domain crossing, machine learning hardware development, and high-speed/low-power design optimization.
Qualcomm offers an exceptional work environment with comprehensive benefits, including world-class health coverage, financial planning support, and continuous learning opportunities. The company's commitment to innovation and technological advancement makes it an ideal place for career growth and development.
Join Qualcomm to be part of a team that's shaping the future of AI and machine learning hardware, while working alongside some of the industry's brightest minds. This role offers the perfect blend of technical challenge and career growth opportunities in a company known for pushing the boundaries of what's possible in technology.
Responsibilities For Sr Staff Machine Learning ASIC Design Engineer
- Develop of Micro-Architecture and specification based on high level design requirements
- Develop RTL design that meets required performance and is optimized for Area and Power
- Integrate pre-verified sub-IPs to build up larger functionality
- Flow bring up and report analysis for Linting, RTL Synthesis, CLP, CDC
- Work closely with verification team to define testplan, debug regression, analyze coverage reports
- Develop SVA assertions for white box verification for formal verification
- Effective communication across teams, multitasking and well-planned execution of the tasks
Requirements For Sr Staff Machine Learning ASIC Design Engineer
- Bachelor's degree in Science, Engineering, or related field and 6+ years of experience, OR
- Master's degree and 5+ years of experience, OR PhD and 4+ years of experience
- Prior experience delivering Verilog and System Verilog RTL
- Strong analytical and debugging skills
- Strong communication and collaboration skills
- Experience with simulation and code coverage tools
- Legally permitted to work on-site in Canada
Benefits For Sr Staff Machine Learning ASIC Design Engineer
- World-class health coverage for employees and eligible dependents
- Financial planning and future preparation programs
- Emotional/mental strength and resilience support
- Wellbeing programs
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship opportunities
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