Lead Digital Design Engineer

A leading technology innovator that pushes boundaries of what's possible to enable next-generation experiences and drives digital transformation.
Backend
Staff Software Engineer
In-Person
8+ years of experience
AI · Hardware

Description For Lead Digital Design Engineer

Qualcomm, a leading technology innovator, is seeking a Lead Digital Design Engineer to join their Hardware Engineering team. This role offers an exciting opportunity to work on cutting-edge technology and push the boundaries of what's possible in digital transformation.

As a Lead Digital Design Engineer, you will be responsible for front-end digital design implementation of Sensor/Mixed signal digital blocks, RTL development and validation, and working closely with SoC power management teams. You'll be involved in critical aspects of hardware design including timing constraints development, power aware checks, and chip level debug.

The ideal candidate should have 8+ years of hardware engineering experience with a strong background in micro-architecture development, RTL design, and front-end flows. Experience with post-silicon bring-up and debug is a plus. You should be comfortable working with global teams and possess excellent communication skills.

At Qualcomm, you'll work alongside some of the most respected engineering and technology experts in the industry. The company offers comprehensive benefits including world-class health coverage, financial planning support, wellbeing programs, and continuous learning opportunities. This is an excellent opportunity to be part of a team that drives innovation and creates world-class products that impact lives globally.

Join Qualcomm to unlock your full potential and be part of groundbreaking technological advancements in hardware engineering.

Last updated 2 days ago

Responsibilities For Lead Digital Design Engineer

  • Front-End/Digital design implementation of Sensor/Mixed signal digital blocks
  • RTL development and validation for linting, clock-domain crossing, conformal low power and DFT rules
  • Work with SoC power management team for power sequencing requirements
  • Work with functional verification team on test-plan development and debug
  • Develop timing constraints and deliver synthesized netlist
  • UPF writing, power aware equivalence checks and low power checks
  • DFT insertion and ATPG analysis for optimal SAF, TDF coverage
  • Provide support to SoC integration and chip level pre/post-silicon debug

Requirements For Lead Digital Design Engineer

Java
  • Bachelor's/Master's degree in Computer Science, Electrical/Electronics Engineering or related field
  • 8+ years of Hardware Engineering experience
  • Experience in micro-architecture development, RTL design, front-end flows
  • Experience with post-silicon bring-up and debug
  • Able to work with teams across the globe and possess good communication skills

Benefits For Lead Digital Design Engineer

Medical Insurance
Mental Health Assistance
Education Budget
  • World-class health coverage for employees and dependents
  • Financial planning and security programs
  • Emotional/mental health support
  • Wellbeing programs
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

Interested in this job?

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