Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort, Assembly)
Description For Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort, Assembly)
Qualcomm Asia Pacific is seeking a Staff R&D Design Technology Integration Engineer to join their team focused on RF Front End Modules for Cellular and Wireless Data markets. This senior technical specialist role requires leadership in developing new technology platforms using expertise in materials, device physics, and semiconductor processes. The position involves working in a dynamic, fast-paced environment, collaborating across multiple product development teams. The role demands extensive experience in semiconductor packaging, process integration, and quality management. The successful candidate will lead technology integration initiatives, manage relationships with foundries and OSATs, and drive innovation in packaging solutions. Qualcomm offers comprehensive benefits, professional development opportunities, and the chance to work with industry-leading experts. The position requires international travel and offers the opportunity to contribute to cutting-edge wireless technology development.
Responsibilities For Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort, Assembly)
- Support development of advanced technologies for Si/GaAs backend interconnect and packaging
- Monitor and improve existing processes for yield, quality, and throughput
- Lead technology integration into products
- Interface with foundries and OSATs for project management
- Work cross-functionally with Design, Device process development, and global NPI teams
- Resolve quality, yield and manufacturing problems
- Participate in value engineering and cost reduction plans
Requirements For Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort, Assembly)
- Master's Degree or equivalent in Mechanical/Materials/Chemical Engineering (PhD Preferred)
- 10+ years of experience in electronics packaging, especially RF module industry
- 5+ years direct experience in process engineering, product integration or quality management
- Solid understanding of Semiconductor packaging materials and processes
- Knowledge of packaging industry standards (IPC, JEDEC, IEEE, ISO, ANSI)
- Understanding of package/product qualification and reliability methods
- Excellent communication skills
- Willingness to travel internationally
Benefits For Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort, Assembly)
- World-class health coverage for employees and dependents
- Financial planning and future security programs
- Emotional/mental health support
- Wellbeing programs and resources
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship opportunities
