Staff STA/Timing Engineer
Description For Staff STA/Timing Engineer
Qualcomm, a leading technology innovator, is seeking a Staff STA/Timing Engineer to join their team in Bangalore. This role offers an exciting opportunity to work at the forefront of hardware engineering, focusing on Static Timing Analysis and timing optimization for complex systems.
The position requires a seasoned professional with 7-8 years of experience in STA/Timing from product-based companies, who can manage complex subsystems and lead small teams. You'll be responsible for crucial aspects of chip design, including synthesis, place and route (PnR), and sign-off convergence, while meeting demanding Power, Performance, and Area (PPA) requirements.
As a Staff STA/Timing Engineer, you'll work with cutting-edge technology, implementing low power design solutions and working with advanced process nodes. Your expertise in ASIC design flows and physical design methodologies will be essential in driving innovation and maintaining Qualcomm's leadership in the semiconductor industry.
The role offers comprehensive benefits including world-class health coverage, financial planning support, and professional development opportunities through continuous learning programs and mentorship. You'll be part of a collaborative environment where your ideas can contribute to world-changing innovations and breakthrough technologies.
Join Qualcomm to work alongside some of the most respected engineering experts in the industry, while having access to resources that will help you grow both professionally and personally. This position offers the perfect blend of technical challenge and career growth opportunities in a company that's shaping the future of technology.
Responsibilities For Staff STA/Timing Engineer
- Plan, design, optimize, verify, and test electronic systems
- Manage complex subsystems and small teams
- Drive synthesis, place and route, and sign-off convergence
- Implement low power design including UPF, multi-voltage domains, and power gating
- Work on ASIC design flows and physical design methodologies
- Collaborate with cross-functional teams to develop solutions
Requirements For Staff STA/Timing Engineer
- Bachelor's or Master's degree from a top-tier institute
- 7-8 years of experience in STA/Timing from product-based companies
- Proven experience in managing complex subsystems and small teams
- Proficiency in synthesis, place and route (PnR), and sign-off convergence
- Expertise in meeting demanding Power, Performance, and Area (PPA) requirements
- Experience in low power design implementation
- Familiarity with ASIC design flows and physical design methodologies
- Strong understanding of circuit design, device physics, and deep sub-micron technology
- Experience working on multiple technology nodes in advanced processes
- Proficiency in automation to drive improvements in PPA
Benefits For Staff STA/Timing Engineer
- World-class health coverage for employees and dependents
- Financial planning and future preparation programs
- Emotional/mental strength and resilience support
- Wellbeing programs
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship programs
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