Turing Design Verification - Sr Engineer

Global technology leader specializing in semiconductor, mobile technologies, and AI/ML innovations.
Hardware
Senior Software Engineer
In-Person
5+ years of experience
AI · Enterprise SaaS

Description For Turing Design Verification - Sr Engineer

Qualcomm India Private Limited is seeking a Senior Design Verification Engineer to join their team working on cutting-edge AI/ML/DL applications. This role offers an exciting opportunity to work with advanced IP's and HW Accelerators in the latest tech nodes. The position involves comprehensive verification responsibilities including functional testing, formal power awareness, and gate-level simulation.

The ideal candidate will bring 5-8 years of experience with strong expertise in System-Verilog, UVM, and hardware verification methodologies. You'll be responsible for creating test plans, developing coverage models, and ensuring thorough verification closure. Knowledge of bus protocols like AHB/AXI is essential, along with proficiency in programming languages such as C and Python.

Qualcomm offers an exceptional work environment where you'll collaborate with leading engineering experts and contribute to world-changing innovations. The company provides comprehensive benefits including health coverage, financial planning support, and continuous learning opportunities. This role presents an excellent opportunity for career growth while working on the forefront of semiconductor and AI technology development.

Join Qualcomm's dynamic team to unlock your potential and be part of groundbreaking technological advancements that impact lives globally. The position offers both technical challenges and professional growth opportunities in one of the world's leading technology companies.

Last updated 12 days ago

Responsibilities For Turing Design Verification - Sr Engineer

  • Work on IP verification and own various DV tasks
  • Create test plans and coverage models
  • Develop test cases and ensure coverage closure
  • Perform Functional, Formal Power aware and Gate level simulation
  • Work on verification of advanced IP's, HW Accelerators and Subsystem for AI/ML/DL Applications

Requirements For Turing Design Verification - Sr Engineer

Python
Linux
  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field with 3+ years experience
  • Proficiency in System-Verilog and scripting languages (Shell, Perl)
  • RTL/gate level simulation debug experience
  • Knowledge of bus protocols like AHB/AXI
  • Experience with SV, UVM, Assertions, GLS
  • Solid knowledge of C and Python
  • 5-8 years of relevant experience

Benefits For Turing Design Verification - Sr Engineer

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
401k
Education Budget
  • World-class health coverage for employees and dependents
  • Financial planning and future security programs
  • Emotional/mental health support resources
  • Wellbeing programs
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship opportunities

Interested in this job?

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