WLAN Subsystem Design Lead - Sr Staff
Description For WLAN Subsystem Design Lead - Sr Staff
Qualcomm CDMA Technologies (QCT) is seeking an experienced WLAN digital designer to join their Bangalore Wireless R&D HW team. This role focuses on WLAN HW subsystem design development for IEEE 802.11 Wifi technologies involving Wifi 6/7/8. The position involves working on cutting-edge ASIC designs on the latest technology nodes, requiring expertise in all aspects of VLSI development cycle.
The ideal candidate will be responsible for design & development of next generation Wifi and Micro-Wifi sub systems for connectivity, hearables, wearables and IOT chips. This role demands strong experience in digital front end design for ASICs, with expertise in RTL coding and multiple clock domain designs. The position offers the opportunity to work with multi-site teams across US, UK, and India, contributing to Qualcomm's world-leading wireless technology solutions.
Key responsibilities include developing micro architecture, implementing designs using Verilog/SV, and working closely with various teams including Systems, Verification, SoC, SW, PD & DFT. The role requires strong technical skills combined with excellent communication abilities and a self-motivated attitude.
Qualcomm offers comprehensive benefits including world-class health coverage, financial planning support, wellbeing programs, and continuous learning opportunities. This is an excellent opportunity to join a global leader in wireless technology and work on innovative solutions that transform industries and enrich lives.
The position requires a minimum of 8 years of experience in digital front end design for ASICs, along with a strong educational background in Electronics, VLSI, or Communications. Experience in 802.11 and Wireless IP/Sub-System design is considered a plus.
Responsibilities For WLAN Subsystem Design Lead - Sr Staff
- Digital design and development (RTL) working in close collaboration with Multi-site Teams across US, UK and India
- Developing the micro architecture and implementing the design using Verilog/SV
- Design and implement defined tasks independently
- Work in close coordination with Systems, Verification, SoC team, SW team, PD & DFT teams
- Run various tool and Analyze reports/waivers
- Self-Motivated to Execute the defined tasks almost independently with minimal guidance
Requirements For WLAN Subsystem Design Lead - Sr Staff
- 8+ years of strong experience in digital front end design for ASICs
- Bachelors or Masters Degree in Engineering in Electronics, VLSI, Communications or related field
- Expertise in RTL coding in Verilog/VHDL/SV of complex designs with multiple clock domain
- Experience in low power design methodology and clock domain crossing designs
- Experience in Spyglass Lint/CDC checks and waiver creation
- Familiarity with various bus protocols like AHB, AXI
- Understanding of full RTL to GDS flow to interact with DFT and PD teams
- Good documentation skills
- Good communication skills
- Self-motivated with good teamwork attitude
Benefits For WLAN Subsystem Design Lead - Sr Staff
- World-class health coverage for employees and dependents
- Financial planning and future security programs
- Emotional/mental strength and resilience support
- Wellbeing programs and resources
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship opportunities
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