Find Rivos Senior Software Engineer software engineering jobs

Rivos is a company focused on SOC design and development, specializing in advanced silicon engineering.

Rivos is seeking a Senior Silicon Bringup and Validation Engineer to join their team and lead critical initiatives in SOC design validation. This role is integral to the company's mission of developing cutting-edge SOC solutions, focusing on key components such as Power Management, DDR/HBM, PCIe, CPU, and data accelerator systems.

The position offers an opportunity to work at the intersection of hardware and software, requiring deep technical expertise in SOC design, including physical design, logic, performance, and power management. As a technical lead, you'll be responsible for bringing up and validating complex SOC subsystems, developing and executing comprehensive validation plans, and ensuring product requirements are met.

You'll lead a team in designing and implementing subsystem silicon bringup plans, collaborating across multiple disciplines including design, architecture, firmware, and software teams. The role involves significant interaction with vendors and partners, requiring strong communication and leadership skills.

This is an ideal position for experienced engineers with a strong background in silicon validation, verification methodologies, and programming skills in C/C++ and Python. The role demands both technical depth and leadership capabilities, offering the opportunity to drive innovation in SOC design and validation methodologies.

Working at Rivos means being part of a team that's pushing the boundaries of silicon engineering, with opportunities to influence the direction of next-generation SOC designs. The position requires on-site presence and offers the chance to work with state-of-the-art technology and tools in silicon development.

Senior Silicon Bringup and Validation Engineer role at Rivos, leading SOC subsystem validation and team coordination for next-generation silicon development.

Silicon Bringup and Validation Engineer

Cutting-edge and well-funded hardware startup in Silicon Valley reimagining silicon and creating computing platforms to transform the industry with advanced technologies.

Join a cutting-edge and well-funded hardware startup in Silicon Valley as a Logic Equivalence Check (LEC) Engineer at Rivos. Our mission is to reimagine silicon and create computing platforms that will transform the industry with the most advanced technologies. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency, and scalability.

As an LEC Engineer, you will be responsible for building and automating formal verification flow and supporting multiple design teams to consolidate resolutions. Your role will involve developing and improving existing flow for logical equivalent checks, working with ABORT/NEQ debugging processes, and using logical equivalence tools such as Conformal LEC and/or Formality.

Key responsibilities include:
- Collaborating with tool vendors for tool issues debugging and resolving
- Working with cross-functional RTL/PD/DFT teams to develop custom solutions
- Developing and maintaining in-house CAD tools and flow
- Proficiency in programming languages such as TCL, Python, and Perl

Additional valuable experience includes:
- Conformal ECO/Formality ECO
- Conformal Lowpower/VCLP
- Low Power implementation flows (UPF)
- Physical Synthesis/PNR and DFT implementation

We offer a fun, creative, and flexible work environment with a shared vision to build products that will change the world. Join us in pushing the boundaries of silicon technology and making a significant impact in the industry.

Required Education:
- BS (preferred in EE) plus 8 years of experience, or
- MS (preferred in EE) plus 5 years of experience

If you're passionate about hardware engineering, formal verification, and want to be part of a team creating next-generation computing platforms, we encourage you to apply for this exciting opportunity at Rivos.

Join Rivos as a Logic Equivalence Check (LEC) Engineer to develop and improve formal verification flows for cutting-edge silicon designs.

Logic Equivalence Check (LEC) Engineer

Rivos is working on software to improve the Deep Learning ecosystem and help hardware engineers build great Deep Learning parallel systems.

Rivos is seeking a DL Communications Collectives SW Engineer to join their team working on improving the Deep Learning ecosystem. This role involves designing and implementing highly optimized communication collectives libraries similar to UCC and NCCL. The ideal candidate will work closely with hardware and software teams to ensure efficient data communication and synchronization across multiple AI accelerators in a distributed system.

Key responsibilities include building communication components of an AI Software Stack, porting AI Software to new hardware platforms, and optimizing communication within AI applications. The engineer will design and implement various communication collectives, optimize algorithms for multi-node clusters, and ensure low-latency, high-bandwidth communication across multi-GPU setups.

The ideal candidate should have a strong background in GPU architectures, parallel and distributed algorithms, and experience with network interconnects. Proficiency in communication collectives libraries, deep learning frameworks, and low-level performance optimization on GPU architectures is crucial. The role requires excellent problem-solving skills, strong communication abilities, and the capacity to work effectively in a fast-paced, collaborative environment.

Rivos offers the opportunity to work with industry veterans, learning technical and organizational skills while contributing to open-source projects. This position is perfect for someone passionate about advancing AI technology and eager to tackle complex challenges in distributed computing and machine learning.

Join Rivos as a DL Communications Collectives SW Engineer to design and optimize communication libraries for AI accelerators in distributed systems.

DL Communications Collectives SW Engineer

Rivos is developing secure-by-design RISC-V based systems and evolving the RISC-V ecosystem.

Rivos is seeking a Security Infrastructure Engineer to join their team working on software, firmware, and hardware to evolve the RISC-V ecosystem and build secure-by-design RISC-V based systems. The security team is responsible for defining external and internal interfaces for secure provisioning and trusted computing base (TCB) updates of their SOC and platforms. They are building security infrastructure services to support secure device provisioning and lifecycle management for the SOC-Integrated Root of Trust (RoT), and manage trusted elements of the platform.

The role involves designing, developing, and deploying security infrastructure services for key management, manufacturing provisioning, certificate authority, and code signing. The ideal candidate will be a full stack developer with fault-tolerant systems experience and a strong security background. They should have experience with hardware security modules (HSM), integrating remote systems with automatic test equipment (ATE), and operational experience in deploying and maintaining security infrastructure.

Rivos is a proponent of open source software and open hardware, contributing improvements to projects they use. This position offers the opportunity to work on cutting-edge RISC-V technology and contribute to the development of secure computing platforms. The role requires a blend of technical expertise in security, software development, and systems integration, making it an exciting opportunity for those passionate about secure computing and emerging technologies.

Security Infrastructure Engineer role at Rivos, focusing on RISC-V based secure systems and infrastructure services.

Rivos Senior Software Engineer Software Engineering Jobs

Find Rivos Senior Software Engineer software engineering jobs