Join Rivos, a well-funded, cutting-edge hardware startup in Silicon Valley, as an Accelerator Microarchitecture Performance Modeling Engineer. Our mission is to reimagine silicon and create accelerated computing platforms that will transform the industry.
In this role, you'll have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy-efficiency, programmability, and scalability. Your responsibilities will include functional and cycle-accurate simulator development, architectural and microarchitectural design-space exploration for programmable accelerators, as well as analysis and optimization of modern, highly-parallel applications.
You'll explore many adjacent areas of research and engineering, cross-cutting many levels of abstraction that must be scaled when building computing machinery - ISA design, application software, compiler optimization, RTL design, RTL correlation, design verification, test writing, and power/area analysis.
We offer a fun, creative, collaborative, and flexible work environment where you can contribute to our vision of building server-class compute machines that fulfill the promise and potential of hardware-software co-design while learning every day.
Key responsibilities include:
Requirements:
This position offers a unique opportunity to shape the future of accelerated computing platforms while working with cutting-edge technology and a talented team. Join us in our mission to transform the industry through innovative silicon design and hardware-software co-design.