Accelerator Post-Silicon Performance Validation Engineer
Description For Accelerator Post-Silicon Performance Validation Engineer
Rivos is seeking a Senior Post-Silicon Performance Validation Engineer to join their Accelerator Performance team. This role is crucial for validating and optimizing the performance of their server compute silicon solutions.
The position offers an exciting opportunity to work at the intersection of hardware and AI/ML, focusing on performance validation of cutting-edge accelerator designs. You'll be responsible for analyzing and optimizing workload performance, particularly in data analytics, graph algorithms, and AI/ML applications.
As a key member of the team, you'll collaborate across multiple departments, including design, architecture, systems, and software teams, to ensure optimal performance for enterprise customer use-cases. The role involves hands-on work with silicon performance measurements, system-level debugging, and infrastructure automation.
The ideal candidate brings 5+ years of experience in SoC validation, strong programming skills in Python and C++, and deep familiarity with LLM/ML workloads. You should be comfortable with performance benchmarking tools like MLPerf and have a proven track record of working in cross-functional teams.
This hybrid position offers the flexibility to work from various locations including Santa Clara, Austin, Portland, Fort Collins, or HsinChu Taiwan. You'll be part of a company that's pushing the boundaries of accelerator design and performance optimization, with a direct impact on next-generation computing solutions.
The role requires both technical expertise and soft skills, including strong communication abilities, technical documentation skills, and the initiative to drive deliverables independently. You'll have the opportunity to influence product development through your performance analysis and optimization work.
Join Rivos to be part of a team that's advancing the state of the art in silicon accelerator technology, working on challenging problems at the forefront of hardware performance optimization.
Responsibilities For Accelerator Post-Silicon Performance Validation Engineer
- Analyze workloads and their performance to drive analysis, optimization and correlation efforts on accelerator design
- Quantify and analyze performance of server workloads (data analytics, graph algorithms, and AI/ML)
- Collaborate with design, architecture, systems, and software teams
- Perform silicon performance measurements and correlate with simulations
- Improve use-case power/performance ratio through hardware and software tuning
- System level performance debugging and silicon performance per watt tuning
- Automate performance validation infrastructure
- Develop and execute silicon characterization tests
Requirements For Accelerator Post-Silicon Performance Validation Engineer
- 5+ years of hands-on experience in bring-up and validation of complex SoCs
- Experience scripting in Python or other programming language
- Experience in object-oriented programming with C and C++
- Experience in bringing up silicons, performing functional and performance validation
- Familiar with the LLM/ML workloads
- Knowledge of common performance benchmarks such as MLPerf
- Experience working with diverse teams
- Strong communication and technical documentation skills
- Initiative in taking ownership & responsibility
- Creative problem-solving abilities for lab validation
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