Silicon Bringup and Validation Engineer

Rivos is seeking a Senior Silicon Bringup and Validation Engineer to join their team and lead critical initiatives in SOC design validation. This role is integral to the company's mission of developing cutting-edge SOC solutions, focusing on key components such as Power Management, DDR/HBM, PCIe, CPU, and data accelerator systems.

The position offers an opportunity to work at the intersection of hardware and software, requiring deep technical expertise in SOC design, including physical design, logic, performance, and power management. As a technical lead, you'll be responsible for bringing up and validating complex SOC subsystems, developing and executing comprehensive validation plans, and ensuring product requirements are met.

You'll lead a team in designing and implementing subsystem silicon bringup plans, collaborating across multiple disciplines including design, architecture, firmware, and software teams. The role involves significant interaction with vendors and partners, requiring strong communication and leadership skills.

This is an ideal position for experienced engineers with a strong background in silicon validation, verification methodologies, and programming skills in C/C++ and Python. The role demands both technical depth and leadership capabilities, offering the opportunity to drive innovation in SOC design and validation methodologies.

Working at Rivos means being part of a team that's pushing the boundaries of silicon engineering, with opportunities to influence the direction of next-generation SOC designs. The position requires on-site presence and offers the chance to work with state-of-the-art technology and tools in silicon development.