Design Verification Engineer (Silicon Engineering)
Description For Design Verification Engineer (Silicon Engineering)
SpaceX, a pioneering space exploration company, is seeking a Design Verification Engineer to join their Silicon Engineering team. This role is crucial in developing cutting-edge FPGAs and ASICs for both space and ground infrastructures that power the Starlink satellite network, the world's largest satellite constellation providing global internet access.
The position offers an exciting opportunity to work alongside world-class cross-disciplinary teams, including systems, firmware, architecture, design, validation, and product engineering specialists. You'll be at the forefront of developing technology that enables connectivity in previously underserved areas, making a significant impact on global communications infrastructure.
As a Design Verification Engineer, you'll be responsible for comprehensive verification processes, from writing test plans to implementing complex SystemVerilog testbenches. The role requires expertise in both UVM and non-UVM frameworks, along with strong programming skills in Python and MATLAB for test automation. You'll be involved in all stages of the verification process, from pre-silicon verification to chip bring-up and post-silicon validation.
The ideal candidate should have at least 2 years of experience in design verification and test bench development, with a bachelor's degree in electrical engineering, computer science, or computer engineering. Advanced degrees are preferred, along with experience in UVM methodologies and strong object-oriented programming knowledge.
SpaceX offers a competitive compensation package, including base salary ranging from $120,000 to $170,000 depending on experience level, plus extensive benefits including equity options, comprehensive healthcare, and retirement plans. This is an opportunity to join a company that's not just pushing the boundaries of technology but actively working towards making humanity a multi-planetary species.
The position requires ITAR compliance and a willingness to work flexible hours when needed. You'll be joining a dynamic environment where adaptability and problem-solving skills are essential, and your work will directly contribute to SpaceX's mission of enabling human life on Mars while providing global internet connectivity through Starlink.
Responsibilities For Design Verification Engineer (Silicon Engineering)
- Responsible for digital ASIC and/or FPGA verification at block and system level
- Write and review test plans, develop test harnesses and test sequences
- Develop SystemVerilog testbench infrastructure for testing designs, including DSP blocks
- Responsible for test plan execution, running regressions, code and functional coverage closure
- Automate test case generation using Python and MATLAB programs
- Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
Requirements For Design Verification Engineer (Silicon Engineering)
- Bachelor's degree in electrical engineering, computer science or computer engineering
- 2+ years of experience with design verification and test bench development
- Must be willing to work extended hours and weekends as needed
- Must be a U.S. citizen, permanent resident, refugee, or asylee (ITAR requirements)
Benefits For Design Verification Engineer (Silicon Engineering)
- Company stock or stock options
- Long-term cash awards
- Potential discretionary bonuses
- Employee Stock Purchase Plan
- Comprehensive medical, vision, and dental coverage
- 401(k) retirement plan
- Short & long-term disability insurance
- Life insurance
- Paid parental leave
- 3 weeks paid vacation
- 10+ paid holidays per year
- 5 days sick leave per year
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