IC Layout Engineer (Silicon Engineering)

SpaceX develops technologies for space exploration, including rockets, spacecraft, and Starlink satellite internet system.
$100,000 - $135,000
Embedded
Entry-Level Software Engineer
In-Person
1+ year of experience
Space · AI

Description For IC Layout Engineer (Silicon Engineering)

SpaceX, a pioneering space technology company, is seeking an IC Layout Engineer to join their Starlink satellite internet project. This role combines cutting-edge silicon engineering with the ambitious goal of providing global internet coverage through the world's largest satellite constellation, currently serving over 5M users worldwide.

The position offers an opportunity to work on multiple silicon projects focusing on integration, lower power, and mixed signal architectures for both space and ground infrastructures. You'll be collaborating with world-class cross-disciplinary teams, including systems architecture, ASIC design, firmware, and various validation teams.

As an IC Layout Engineer, you'll be responsible for crucial aspects of chip design, from floor planning to final tape out. The role requires expertise in custom RF and analog circuit layouts, with attention to matching and parasitic capacitance minimization. You'll work with advanced node IC layouts and handle circuits with frequencies up to 50GHz.

The compensation package is competitive, ranging from $100,000 to $135,000 based on experience level, plus extensive benefits including equity, medical coverage, and 401(k). This is an excellent opportunity for someone passionate about combining silicon engineering with space technology, working on projects that directly impact global connectivity.

SpaceX offers a unique environment where your work directly contributes to the company's mission of enabling human life on Mars. The role requires ITAR compliance and demonstrates SpaceX's commitment to equal opportunity employment.

Last updated 2 days ago

Responsibilities For IC Layout Engineer (Silicon Engineering)

  • Work with IC designers and chip leads to determine chip floor plan
  • Estimate layout work schedule and identify complex areas
  • Perform layout of custom RF and analog circuit blocks
  • Perform design rule checking, electrical rule checking and layout versus schematic checks
  • Perform top-level layout integration and final tape out
  • Work with EDA suppliers to trial new tools
  • Generate guides and demos for team improvements

Requirements For IC Layout Engineer (Silicon Engineering)

Linux
Python
  • Bachelor's degree in electrical or computer engineering
  • 1+ years of professional experience as IC layout designer OR 3+ years with IC layout design
  • Must be willing to work extended hours and weekends as needed
  • Must be U.S. citizen, permanent resident, refugee, or asylee (ITAR requirements)

Benefits For IC Layout Engineer (Silicon Engineering)

Medical Insurance
Dental Insurance
Vision Insurance
401k
Equity
Parental Leave
  • Company stock and stock options
  • Long-term cash awards
  • Discretionary bonuses
  • Employee Stock Purchase Plan
  • Comprehensive medical, vision, and dental coverage
  • 401(k) retirement plan
  • Short and long-term disability insurance
  • Life insurance
  • Paid parental leave
  • 3 weeks paid vacation
  • 10+ paid holidays per year
  • 5 days sick leave for exempt employees

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