SpaceX, a pioneering space technology company, is seeking a Senior Design Verification Engineer to join their Silicon Engineering team. This role is crucial in developing next-generation FPGAs and ASICs for both space and ground infrastructure of the Starlink project, the world's largest satellite constellation providing global internet coverage.
The position offers an opportunity to work alongside world-class cross-disciplinary teams, including systems, firmware, architecture, design, validation, and product engineering. You'll be at the forefront of developing cutting-edge solutions that expand the performance and capabilities of the Starlink network, bringing connectivity to previously underserved areas worldwide.
As a Sr. Design Verification Engineer, you'll be responsible for comprehensive verification processes from pre-silicon to post-silicon validation, requiring expertise in test plan development, implementation of coverage models, and results analysis. The role demands strong object-oriented programming knowledge and experience with verification methodologies such as UVM/OVM/VMM.
The compensation package is highly competitive, ranging from $170,000 to $230,000 annually, complemented by extensive benefits including equity options, comprehensive healthcare, and various financial incentives. This is an exceptional opportunity to contribute to SpaceX's mission of making humanity a multi-planetary species while developing groundbreaking technology that impacts global connectivity.