Sr. Design Verification Engineer (Silicon Engineering)

SpaceX, a pioneering space technology company, is seeking a Senior Design Verification Engineer to join their Silicon Engineering team. This role is crucial in developing next-generation FPGAs and ASICs for both space and ground infrastructure of the Starlink project, the world's largest satellite constellation providing global internet coverage.

The position offers an opportunity to work alongside world-class cross-disciplinary teams, including systems, firmware, architecture, design, validation, and product engineering. You'll be at the forefront of developing cutting-edge solutions that expand the performance and capabilities of the Starlink network, bringing connectivity to previously underserved areas worldwide.

As a Sr. Design Verification Engineer, you'll be responsible for comprehensive verification processes from pre-silicon to post-silicon validation, developing test plans, and ensuring quality through rigorous testing methodologies. The ideal candidate should have strong programming skills, experience with verification methodologies like UVM/OVM/VMM, and the ability to work in a dynamic environment.

The role offers competitive compensation between $160,000-$220,000 annually, plus substantial benefits including equity options, comprehensive healthcare, and various other perks. This is an excellent opportunity for experienced engineers who want to contribute to SpaceX's mission of making humanity a multi-planetary species while developing revolutionary communication technology.