Sr. IC Packaging Test Engineer, Silicon Technology (Starlink)
Description For Sr. IC Packaging Test Engineer, Silicon Technology (Starlink)
SpaceX, the pioneering space exploration company founded with the vision of making humanity a multi-planetary species, is seeking a Senior IC Packaging Test Engineer for their revolutionary Starlink project. This role sits at the intersection of SpaceX's vertical integration strategy, as they bring integrated circuit packaging and assembly in-house to enhance their world's largest satellite constellation.
The position offers a unique opportunity to work on cutting-edge technology that's actively providing high-speed internet to over 4 million users worldwide through Starlink's satellite network. As a Sr. IC Packaging Test Engineer, you'll be instrumental in developing and implementing test solutions for semiconductor packaging and wafer testing, working directly with test equipment manufacturers and in-house chip & system designers.
This role requires a strong background in both hardware and software, combining electrical engineering expertise with programming skills in languages like C++ and Python. You'll take ownership of packaged component and wafer testing processes, helping make Starlink more accessible and affordable to users globally. The position demands expertise in RF testing, digital waveform programming, and semiconductor functional testing.
Working at SpaceX means being part of a mission-driven team that's literally reaching for the stars. The company's commitment to vertical integration and in-house manufacturing presents unique opportunities to influence the entire production process. While the role demands technical excellence and sometimes requires extended hours for critical deadlines, it offers the chance to work on technology that's actively shaping the future of global communications and space exploration.
The ideal candidate will bring 7+ years of microelectronics packaging development experience, strong programming capabilities, and expertise in RF and mixed signal testing. This position is perfect for someone who wants to combine their technical expertise with SpaceX's mission to revolutionize space technology and global communications infrastructure.
Responsibilities For Sr. IC Packaging Test Engineer, Silicon Technology (Starlink)
- Own electrical test equipment definition for packaging and wafer level production testing
- Bring-up of test equipment and test programs for mass manufacturing
- Create automated test equipment (ATE) test programs and test plans
- Define full and comprehensive testing requirements to ensure product conformance
- Schematic and electrical review for all test equipment
- Supplier test interface for implementing new features, cost, and productivity improvements
- Implement advanced testing solutions for SpaceX next generation products
Requirements For Sr. IC Packaging Test Engineer, Silicon Technology (Starlink)
- Bachelor's degree in electrical engineering, software, computer & systems, physics, or other applied engineering discipline
- 5+ years of Programming experience in C/C++/Visual/Python
- 7+ years industry experience with microelectronics packaging development
- Expertise in developing digital, high-speed and RF semiconductor test programs for production
- Strong RF test knowledge
- Experience with digital, high speed SERDES, RF, and mixed signal testing
- Wafer sort, wafer probe, probe card design and test experience
- Ability to work extended hours or weekends as needed for mission critical deadlines
- Must be a U.S. citizen, permanent resident, refugee, or asylee due to ITAR requirements
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