Sr. IC Packaging Test Engineer, Silicon Technology (Starlink)

SpaceX is revolutionizing space technology with the ultimate goal of enabling human life on Mars. As part of their Starlink initiative, which is currently the world's largest satellite constellation serving over 4M+ users worldwide with broadband internet, they are bringing integrated circuit packaging and assembly in-house.

The Sr. IC Packaging Test Engineer role is a crucial position within the Starlink team, focusing on semiconductor packaging and wafer testing. This role offers a unique opportunity to work at the intersection of space technology and semiconductor development, contributing directly to making Starlink more accessible globally.

As a Sr. IC Packaging Test Engineer, you'll take full ownership of packaged component and wafer testing, working closely with test equipment manufacturers and in-house chip & system designers. You'll be responsible for developing and implementing production test solutions, creating automated test equipment programs, and defining comprehensive testing requirements.

The position offers competitive compensation ($130,000 - $180,000) and comprehensive benefits including stock options, medical coverage, and 401(k). You'll be part of a team that's literally reaching for the stars, working on cutting-edge technology that's changing how the world connects.

The ideal candidate will bring strong expertise in semiconductor packaging development, RF test knowledge, and experience with digital, high-speed SERDES, and mixed signal testing. This role requires both technical depth and the ability to work in SpaceX's fast-paced, mission-driven environment.

Join SpaceX to be part of a team that's not just developing next-generation products, but shaping humanity's future in space while bringing internet connectivity to the world's most remote locations.