CPU Core Level Feature/Testplan Verification Engineer
Description For CPU Core Level Feature/Testplan Verification Engineer
Tenstorrent, a pioneering company in AI technology, is seeking a CPU Core Level Feature/Testplan Verification Engineer to join their innovative team. The company is at the forefront of revolutionizing AI computing by developing cutting-edge solutions that unite advances in software models, compilers, platforms, networking, and semiconductors.
The role demands a seasoned professional with at least 8 years of experience in CPU microarchitecture and verification. You'll be responsible for comprehensive testplanning, stimulus development, and regression debugging for simulation and emulation environments. The position offers an opportunity to work with state-of-the-art RISC-V CPU technology and contribute to pushing the boundaries of AI computing performance.
As a verification engineer, you'll be deeply involved in understanding and implementing ISA and microarchitectural specifications, developing coverage metrics, and ensuring high-quality delivery of CPU core and cluster components. The role requires expertise in multiple technical areas, including RTL debugging, assembly, C/C++, UVM-based stimulus generation, and various hardware description languages.
The position offers a competitive compensation package ranging from $100,000 to $500,000, including base and variable compensation, reflecting the company's commitment to attracting top talent. Working in either Austin, TX or Santa Clara, CA in a hybrid setting, you'll be part of a diverse team of technologists who share a passion for AI and a deep desire to build the best AI platform possible.
This is an excellent opportunity for someone who values collaboration, curiosity, and has a commitment to solving complex technical challenges. The role offers the chance to work at the intersection of AI and hardware development, contributing to groundbreaking advancements in computing technology. Join a team that emphasizes innovation, technical excellence, and the pursuit of revolutionary solutions in the AI computing space.
Responsibilities For CPU Core Level Feature/Testplan Verification Engineer
- Functional verification with emphasis on core level testplanning, stimulus development and regression debug
- Create comprehensive testplans based on ISA and microarchitectural specifications
- Debug core level failures and implement improvements
- Develop architectural and microarchitectural coverage
- Support design deployment across simulation and emulation platforms
- Develop random and directed stimulus for pre-silicon, emulation and post-silicon
- Work with design, test and post silicon validation teams
Requirements For CPU Core Level Feature/Testplan Verification Engineer
- BS/MS/PhD in EE/ECE/CE/CS with at least 8 years of experience
- Strong background in high performance OOO CPU microarchitecture
- Experience with ISAs - x86, ARM or RISCV
- Experience debugging RTL and DV in simulation environment
- Proficient in assembly, C/C++ and UVM based stimulus generation
- Familiar with simulation, formal and emulation environments
- Hands-on with Python and PERL scripting
- Experience with Verilog, VHDL and simulators
- Strong problem solving and debug skills
Benefits For CPU Core Level Feature/Testplan Verification Engineer
- Competitive compensation package
- Benefits
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