RTL Analysis Methodology Engineer

Tenstorrent, a pioneering company in AI technology, is seeking an RTL Analysis Methodology Engineer to join their AI core design and verification team. The company is at the forefront of revolutionizing AI computing, developing cutting-edge solutions that unite innovations in software models, compilers, platforms, networking, and semiconductors.

The role focuses on the development and verification of the Tensix core, which is architected to support modern AI workloads for both inference and training use-cases. As an RTL Analysis Methodology Engineer, you'll be responsible for designing and implementing scalable RTL analysis methodologies, working with various aspects including linting, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), and power analysis.

The position offers an opportunity to work with a diverse team of technologists who have developed a high-performance RISC-V CPU from scratch. You'll be collaborating closely with RTL design and emulation teams, implementing best practices, and driving improvements in the RTL design flow. The role requires strong expertise in RTL design, EDA tools, git, and CI enablement.

This hybrid position offers flexibility with locations in Santa Clara, Austin, or Toronto, and comes with a competitive compensation package ranging from $100k to $500k including base and variable compensation. The company values collaboration, curiosity, and a commitment to solving hard problems, making it an ideal environment for those passionate about pushing the boundaries of AI technology.

Please note that due to U.S. Export Control laws, certain positions require compliance with licensing regulations, and citizenship/permanent residency information may be required during the employment process.