Senior Verification Engineer
Description For Senior Verification Engineer
Tenstorrent, a pioneering company in AI technology, is seeking a Senior Verification Engineer to join their team in Tokyo, Japan. The company is at the forefront of revolutionizing AI computing, developing cutting-edge solutions including a high-performance RISC-V CPU from scratch. This role offers a unique opportunity to work on high-profile projects involving multiple chiplet integration in a System-in-package, collaborating with worldwide experts and leaders across the USA, Japan, and other countries.
The position requires a seasoned professional with at least 8 years of industry experience in CPU or SoC verification. You'll be responsible for ensuring system functionality and performance, working with UVM-based verification methodology, and building verification infrastructure components. The role involves creating testbenches, implementing test suites, and driving convergence towards tape-out while working closely with architects, software, and design teams.
This is an excellent opportunity for someone passionate about AI and hardware engineering, offering the chance to work with cutting-edge technology and contribute to revolutionary AI computing solutions. The hybrid work arrangement in Tokyo provides flexibility while maintaining collaborative opportunities with the team. The company values collaboration, curiosity, and a commitment to solving hard problems, making it an ideal environment for those who want to push the boundaries of AI technology.
The position offers competitive compensation and benefits, and the company is actively contributing to Japan's semiconductor industry development through government-supported initiatives. This role provides an exceptional opportunity to be part of a diverse team of technologists working on the future of AI computing infrastructure.
Responsibilities For Senior Verification Engineer
- Verify Tenstorrent's digital IP and SoC logic at chiplet integration level using UVM based verification methodology
- Build and improve verification infrastructure components including model builds and simulation/regression runs
- Create verification components like testbenches, checkers and test generators
- Add assertions and coverages along associated methodologies
- Build verification test plans for subsystems and align with project stakeholders
- Publish and review verification metrics and drive convergence towards tape-out
- Work across boundaries with architects, software and design/emulation teams
- Guide and mentor junior engineers
Requirements For Senior Verification Engineer
- Bachelor, Master or PhD degree in electrical, computer engineering or computer science
- At least 8 years industry experience in CPU or SoC verification
- Experience with verification flows, scripting and automation
- Good knowledge of logic design
- Knowledge of Verilog/v2k/system Verilog
- Strong problem solving skills
- Excellent organizational and communication skills
- Good English language skills (written and spoken)
Benefits For Senior Verification Engineer
- Competitive compensation package
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