Staff Engineer, CPU Core Feature Verification and Debug

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency.
$100,000 - $500,000
Embedded
Staff Software Engineer
Hybrid
51 - 100 Employees
3+ years of experience

Description For Staff Engineer, CPU Core Feature Verification and Debug

Tenstorrent is at the forefront of AI technology, revolutionizing performance, usability, and cost-effectiveness in the industry. As AI reshapes computing, our solutions integrate innovations across software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists has developed a high-performance RISC-V CPU from scratch, driven by a passion for AI and a commitment to building the best AI platform possible.

We're seeking a Staff Engineer for CPU Core Feature Verification and Debug, responsible for ISA and microarchitectural verification. This role involves functional verification with a focus on core-level testplanning, stimulus development, and regression debug for simulation and emulation regressions. You'll create comprehensive testplans based on ISA and microarchitectural specifications, conduct hands-on debug for core-level failures, and develop architectural and microarchitectural coverage for core features.

Key responsibilities include:

  • Developing random and directed stimulus spanning pre-silicon, emulation, and post-silicon domains
  • Supporting design deployment across simulation and emulation platforms
  • Collaborating with design, test, and post-silicon validation teams to ensure high-quality delivery of the entire CPU core/cluster

The ideal candidate will have:

  • BS/MS/PhD in EE/ECE/CE/CS with at least 3 years of experience
  • Strong background in high-performance OOO CPU microarchitecture
  • Experience with ISAs like x86, ARM, or RISC-V
  • Proficiency in RTL and DV debugging in simulation environments
  • Experience with assembly, C/C++, and UVM-based stimulus generation
  • Familiarity with simulation, formal, and emulation environments
  • Hands-on scripting skills (Python, PERL)
  • Experience with hardware description languages and simulators

This hybrid role is based out of Austin, TX or Santa Clara, CA. Tenstorrent offers competitive compensation ranging from $100k - $500k, including base and variable compensation targets, along with a comprehensive benefits package. Join us in shaping the future of AI technology!

Last updated 5 months ago

Responsibilities For Staff Engineer, CPU Core Feature Verification and Debug

  • Functional verification with emphasis on core level testplanning, stimulus development and regression debug
  • Create comprehensive testplans based on ISA and microarchitectural specifications
  • Hands-on debug for core level failures
  • Develop architectural and microarchitectural coverage for core features
  • Support design deployment across simulation and emulation platforms
  • Develop random and directed stimulus for pre-silicon, emulation and post-silicon domains
  • Collaborate with design, test and post silicon validation teams

Requirements For Staff Engineer, CPU Core Feature Verification and Debug

Python
  • BS/MS/PhD in EE/ECE/CE/CS with at least 3 years of experience
  • Strong background in high-performance OOO CPU microarchitecture
  • Experience with ISAs like x86, ARM, or RISC-V
  • Proficiency in RTL and DV debugging in simulation environments
  • Experience with assembly, C/C++, and UVM-based stimulus generation
  • Familiarity with simulation, formal, and emulation environments
  • Hands-on scripting skills (Python, PERL)
  • Experience with hardware description languages and simulators

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